Cisco ESR-PRE1

Cisco ESR-PRE1. Performance Routing Engine, 512 DRAM and 32M Flash. Replacing the simpler parity error algorithm.

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Performance Routing Engine, 512 DRAM and 32M Flash

The PRE1 module supports error checking and correction (ECC) for all onboard memory, replacing the simpler parity error algorithm.

Because parity error detection can only detect errors, the ECC feature helps protect against processor downtime by correcting errors and detecting them. The PRE1 module can automatically correct single-bit errors as small as one bit per nibble, protecting the PRE1 module from memory corruption due to transient memory problems.

The ECC feature is also more sensitive and precise in detecting errors. The PRE1 module can detect an error in only one bit out of each 64-bit block. It can also detect errors in two, three, or four bits in each 64-bit block.

The Cisco IOS Release 12.2(4)XF automatically enables the ECC feature on PRE1 modules. Two command- line interface (CLI) commands are enhanced to provide information about ECC operation:

  • show hardware pxf xcm—Adds a display for the ECC counters for each PRE1 module. For the older PRE modules, this command shows the message "ECC is not supported for this revision."
  • clear pxf xcm counters—Adds support for clearing the ECC counters.